IBM is achieving 95 percent first time right silicon for its 0.13-micron designs, but when it comes to foundry customers the figure goes down to 5 percent,  said Tom Reeves, VP and general manager of IBM's ASIC division.

"Our 0.13-micron re-spin rate is 95 percent while the worldwide average is 50 to 60 percent. And that's not for bulk CMOS, that's for our SOI 0.13-micron process," said Reeves . "But we are also a foundry business and the rate for first time right silicon there is less than 5 percent. The average re-spin number from foundry designs is 2.5 passes."

On the rising cost of mask-sets -- said at the conference by Sony corporate advisor Tsugio Makimoto to be $750,000 at 0.13-micron, $1.6 million at 90nm and $3 million at 65nm -- Reeves commented: "We're in the high-value, high-volume ASIC market which is a $14 billion market. Our average content is $20 million to $30 million, rising mask costs are a trivial issue in contracts of that size."

IBM is about to deliver its very first volume production of an SOC on 90nm, said Reeves. This will be a design for Apple.