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Chartered begins prototyping chips at 12-inch wafer fab


Friday, January 28, 2005

Chartered Semiconductor Manufacturing has begun prototyping chips for customers at its 12-inch Fab 7, at advanced technology nodes.

The prototyping activities currently run on Chartered’s 0.13-micron process, a 90nm cross-foundry platform jointly developed by Chartered and IBM, and a 90nm silicon-on-insulator (SOI) process tuned to IBM’s high-performance product needs. The 90nm cross-foundry platform is targeted for mass production in mid-2005.

Chartered claims its 0.13-micron, 90nm and 90nm SOI processes in Fab 7 out-perform or are on a par with industry benchmarks. The initial defect-density metrics from Chartered’s 12-inch lines are meeting or exceeding customers’ expectations.

Hoping to accelerate its yield ramp, Chartered also said its teams have started working with manufacturing process control experts from AMD, to integrate portions of AMD’s fab-automation technologies and deploy portions of its manufacturing methodologies at Fab 7. These technologies, methodologies and skill sets are known collectively as AMD Automated Precision Manufacturing (APM).

Chartered is also implementing PDF Solutions’ Characterization Vehicle Infrastructure across Fab 7’s processes, to optimize design rules to process-margin sensitivity.

The Chartered-IBM 90nm cross-foundry platform offers a triple-gate oxide option and is an all-copper interconnect process that features up to nine levels of metallization and low-k dielectric. The process is capable of supporting multiple voltage designs for power and performance optimization and for input/output voltages at 3.3 volts, 2.5 volts, 1.8 volts, 1.5 volts and 1.2 volts.

Products that are suited to the Chartered-IBM 90nm process include graphics chips, digital consumer products, storage and networking products, gaming products and high-performance processor products. To help customers and design partners validate their designs, intellectual property and prototypes on the 90nm process, Chartered also runs quarterly multi-project wafer shuttles at competitive cycle times.

By: DocMemory
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