Friday, May 27, 2005
VIA Technologies Inc. is rolling out a next-generation processor, the C7, that it hopes will give it a better shot at building market share in notebooks and small form factor desktop PCs.
The C7 is based on the 'Esther' core, which VIA claims is the world's smallest, lowest power and most secure native x86 processor. It is a follow-on to the C3, which had a maximum clock frequency of 1.4-GHz and has sold mostly into a range of embedded applications ranging from set-top boxes to thin clients. The C7 is set to take the clock frequency up to 2-GHz and consume a maximum of 20 watts, thanks to the use of an IBM 90-nanometer manufacturing process that combines silicon-on-insulator and strained silicon technologies.
The C7 also includes security enhancements, such as support for SHA-1 and SHA-256 hashing for secure message digests, and a hardware-based Montgomery Multiplier supporting key sizes up to 32-kbits in length to accelerate public key cryptography, such as RSA. It also includes execute protection (NX), to guard against malicious software such as worms and viruses. Its base security features already include support for full AES encryption and a random number generator.
VIA has been in the processor business for six years, but has never broken beyond 1 percent of the market. The company's strategy was to provide a low-cost CPU, even if it meant sacrificing a little clock speed. So the C3 has had the right price, but never had enough performance to compete in the desktop and notebook computer sectors.
The C7 is VIA's chance to change that. "Up to now, if you look at notebooks, we haven't had much penetration. The C7's 1.5-GHz to 2-GHz pretty much puts us in the sweet spot of where Centrino is and where Celeron-M is. It really helps with the thin and light category, too, which even AMD with Turion doesn't hit," said Richard Brown, VIA's associate vice president of international marketing.
The C7 will also include a proprietary front-side bus, called the V4, which starts at 400-MHz clock frequency and will eventually scale to 800-MHz. It will enable a lower pin count for processor and chipsets and VIA claims the bus offers a 50 percent increase in bandwidth when compared with Intel's Pentium-M.
There's also an extra 64-kbytes of cache in the C7, which evens out the L1 and L2 caches at 128-kbytes each. Various other features include SSE2/SSE3 support, branch prediction, and two core clock PLLs, which help avoid performance interruptions when plug and play devices are added to the system, such as a USB stick.
The C7 die occupies 30 square millimeters and comes in clock speed versions of 1.5-GHz with a maximum power consumption of 7 watts and 1.8-GHz with a maximum power consumption of 15 watts.
By: DocMemory Copyright © 2023 CST, Inc. All Rights Reserved
|