Monday, June 20, 2005
Intel Corp. has used its 90-nm process technology as the basis for an all-CMOS wireless LAN transceiver designed as a system-in-package (SiP). The device, capable of both 2.45- and 5-GHz operation, was presented Friday (June 17) at the VLSI Symposium in Kyoto, Japan.
Intel said the transceiver features on-board power and low-noise amplifiers and 1.4-V operation. The SiP is the next step toward the company's vision of ubiquitous connectivity and an indication that Intel is rapidly developing the RF capability to achieve that goal.
"Intel is known for its research and is known for its microprocessors, but the fact that two out of the five papers are from Intel shows how far we've come," said Krishnamurthy Soumyanath, senior principal engineer and director of the Communications Circuits Lab of Intel's Corporate Technology Group (Hillsboro, Ore.).
Its second paper described a highly linear filter and VGA chain with novel dc-offset and correction in a 90-nm digital CMOS process. Other papers in the session came from Matsushita, NEC Corp., the University of Tokyo and the Hong Kong University of Science and Technology.
Intel has long advocated the use of CMOS for wireless applications in order to achieve its goal of multimode radios in a laptop or handset device. The end game is a type of cognitive radio with a reusable baseband.
To achieve that goal, according to Soumyanath, lower-power operation is essential, "but it's very hard to do analog circuits at low voltage." Low power must also be combined with lower cost and wider analog bandwidths of up to 100 MHz, he added. That's 60 MHz beyond what's being proposed for IEEE 802.11n-based next-generation WLANs.
Intel researchers using its 90-nm process achieved advances in SiP integration using microstrips, 5-GHz power amplifier integration, frequency planning to mimimize noise from the amplifier, short transistor stacks on the amplifier for low-voltage operation and I/Q mismatch calibration techniques to simplify and speed production.
The result, according to the paper, is a transceiver with better than -71 dBm sensitivity for 64 QAM while drawing 120 mA from a 1.4-V supply. On the transmit side, the integrated 3.3V, 5-GHz power amplifier delivers 9 dBm average power with an EVM better than "25 dB.
The FCBGA-packaged IC occupies a total die area of 12.25-mm2, and draws 170 mW (1.4V supply) in the RX mode and 800 mW (dual 1.4V and 3.3V supplies) in the TX mode.
By: DocMemory
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