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Samsung Develops Chip with 70 Nano Technology


Tuesday, October 18, 2005 Samsung Electronics as developed a 512-Megabit (Mb) DDR2 SDRAM using the 70-nanometer process, the smallest process technology yet applied to a DRAM device.

 

The most advanced processing technology at least doubles the number of chips yielded per wafer compared to 90nm technology, it said.

 

Samsung plans an aggressive time-to-market DRAM implementation for leading nanometer process technologies as it did with its introduction of the 90nm process in mid-2004 and the 80nm in the second half of 2005.

 

The 70 nm process technology is scheduled to be used in production beginning in the second half of 2006 for 512M, 1G and 2G densities, it added.

By: DocMemory
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