Tuesday, November 1, 2005
Matsushita Electric will make a strategic move from 130-nanometer manufacturing to the 65-nm generation this month as it begins to ship 65-nm chips in volume.
"Matsushita will design all major system-on-chip LSIs on a 65-nm process from now on," said Susumu Koike, Matsushita's senior managing director in charge of technology and president of Matsushita's semiconductor company.
Matsushita completed its 300-mm wafer fab in Uozu City, Japan this month, two months earlier than planned. "I believe we have entered the 65-nm generation earlier than any other company for the volume production of system-on-chip LSIs, especially in low-power-consumption processes," said Koike.
Matsushita has invested about $1.1 billion in its Uozo fab to establish an initial monthly capacity of 6,500 wafers. The company expects the fab to reach full operation in 2007 or 2008.
The fab has room to add another 5,500 wafers a month, to increase capacity to 12,000 wafers/month. "We want to expand the capacity to the maximum around 2009, depending on the market situation. At that time, we may use the 65-nm process or a more-advanced-generation process," said Koike.
By: DocMemory
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