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Infineon produces 65nm samples


Thursday, February 2, 2006

Infineon Technologies AG announced that it has produced first sample chips based on its 65nm CMOS platform technology.

Infineon leveraged the results of the 65nm/45nm alliance composed of IBM, Chartered, Infineon and Samsung (ICIS). The wafer production was done in the frame of the manufacturing partnership with Chartered. According to Infineon, its implementations of 65nm MCU-/DSP-cores, libraries and RF as also analog/mixed-signal macros outperform the performance-to-power ratio known in previous technology generations.

"The data available today emphasizes the strengths of our alliance strategy resulting into a leading position towards time-to-market, figure-of-merits and manufacturing flexibility by pooling significant R&D resources [as well as] exploiting a huge amount of intellectual capital," said Hermann Eul, member of the Infineon management board and head of Infineon's communication solutions business group.

An ARM9 based subsystem, a major component of mobile phones, a range of digital cell libraries, and a variety of SRAM, ROM, RF and analog/mixed-signal functions were said to be verified successfully. Infineon added that the functionality of the ARM9 CPU core, a DSP, and other macro and library elements were proven with silicon from the ICIS alliance, as well as from the target manufacturing partner Chartered.

"Infineon decided to pursue a migration into 65nm technology given the trade-off between manufacturing cost triggered by 193nm lithography and design-to-cost efficient material innovations in 65nm low-power technology," said Eul. "The 65nm technology will be the technology foundation for the coming years within the Infineon communication products segment"

By: DocMemory
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