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Agilent announced High Speed Memory tester


Wednesday, February 22, 2006 Agilent Technologies announced it has entered the high-speed memory test market with the Agilent 93000 High-Speed Memory (HSM) Series, the fastest and most accurate memory final-test solution on the market. The HSM Series is a high-volume production, final-test solution for the new class of high-speed DRAM devices used in memory-hungry computer and consumer electronics devices, such as game consoles (Sony PlayStation 3 and Microsoft Xbox 360, for example), high-definition TV, and servers.

Agilent leveraged the advanced test technology and scalable, per-pin architecture of its proven Agilent 93000 test platform to ensure high test quality and fast "yield learning"(1) at the lowest cost-of-test in this memory category. Complementing the Agilent Versatest Series of memory testers that provide flash wafer sort/final test and DRAM wafer sort, the new HSM Series tests memory device interfaces at speeds exceeding 3.6 gigabits per second (Gbps).

"High-resolution graphics applications and advanced processor architectures are blazing new trails for memory specifications," said Bob Merritt, vice president of Semico Research Corp. "Moving that kind of performance into the price range for high-volume applications is inextricably tied to the test infrastructure."

The speed of high-end DRAM increases by about 30 percent annually to keep pace with the ever-growing need for higher-memory bandwidth in applications that require intensive computing, such as gaming and high-definition entertainment. As the speed, density and complexity of DRAM designs have increased, manufacturers have adopted nanometer process technology, which, in turn, has introduced new categories of manufacturing defects, such as internal random delay, intra-die variation of transistor parameters, and crosstalk-based AC timing delay.

New I/O concepts for the high-end memory types also require per-pin de-skewing, source-synchronous clocking and fast data rates. Until now, the memory ATE industry has not been able to meet these demanding technology requirements while still maintaining low cost-of-test, which is critical for price-sensitive DRAM manufacturers.

The Agilent 93000 HSM Series addresses these requirements with its tester-per-pin architecture that enables higher speeds, precision accuracy and improved yields, making it the lowest cost-of-test solution for this emerging class of high-speed memory. With full I/O and maximum memory core access testing at up to 3.6 Gbps in a single insertion into the test system, the HSM Series offers the best performance available for high-speed memory test.

"The 93000 HSM Series is already in production with a number of our major DRAM customers," said Pascal Ronde, vice president of Agilent's Semiconductor Test business. "The HSM Series was built specifically to meet the unique requirements of high-speed DRAM final test, yet it is based on innovative extensions of the proven, flexible and scalable architecture of the 93000 platform."

Key Features and Benefits of the 93000 HSM Series

-- This high-volume production solution comes with an Agilent-engineered, integrated test-cell, which ensures reliable operation, high up-time and seamless support.

-- The 93000 HSM Series supports parallelism of 16x sites (for 16x organized XDR (extreme data rate), and 32x organized GDDR (graphics double data rate) DRAMs) in a single test-head. Paired with parallel eye-finding source sync, this makes the 93000 HSM Series the most cost-effective production test solution for high-speed memories at ensured device quality.

-- HSM is the only solution available for XDR. For GDDR, the HSM Series' 3.6 Gbps data rate provides unmatched test quality and a 50 percent cost advantage over competitive solutions, with a performance margin that will allow for testing future GDDR.

-- Its at-speed capture of failure data at all sites in parallel enables yield learning for faster time-to-profit in production without additional hardware costs.

-- The HSM Series supports the most complex test patterns with its non-interleaved, at-speed per-pin APG (algorithmic pattern generator) to ensure required test quality and fast yield learning.

-- The new Memory-Test language (MTL) allows users to program the HSM Series with test programs in a C++ style for fast test program generation.

-- Per-pin memory ATE architecture will be needed for future emerging DRAM technologies. The HSM Series provides the industry's most flexible per-pin electronics for maximum flexibility in manufacturing to address all DRAM and SRAM technologies today and in the future.

Availability

The HSM Series is available now in two speed classes: 2.2 Gbps data rate (speed binned hardware) and a top-speed version at 3.6 Gbps.

By: DocMemory
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