Configurable logic chipmaker Xilinx Inc. said Tuesday that that it has sampled first silicon for the 65nm generation of its Virtex FPGA product family.

"Our dual-foundry strategy continues to pay dividends, with unsurpassed access to leading edge process technology and manufacturing prowess," Erich Goetting, VP and GM of Xilinx's Advanced Products Division, said in a statement. "The 11-layer metal, CMOS triple-oxide II process technology ensures that our FPGAs continue to set the pace in density, performance and low power.

"With our move to nickel-silicide self aligned technology, and full low-k for all inter-metal dielectrics, the transition to 65nm brought significant benefits to all areas, especially performance and power," Goetting said. "From a manufacturing standpoint, Toshiba and UMC combined can support 300mm/65nm wafer production in volumes exceeding 15,000 wafers per month."

Certain Xilinx customers and partners have received early access beta software earlier this year to begin evaluation and design of 65nm Virtex FPGAs, the company said. The software should be general availability in the second half of 2006, according to Xilinx.

By: DocMemory
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