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Samsung improves yield, run DDR2 on 80nm


Tuesday, March 14, 2006

Samsung Electronics Co. Ltd. today announced that it has begun mass producing 512Mbit  DDR2 DRAM on an 80nm scale.

With 80nm process technology, Samsung said it is able to increase its production efficiency by 50 percent over the previous 90nm process.

Samsung said it utilized many of the basic features of 90nm geometries for the 80nm transition and, as a result, required minimal upgrades to its fabrication lines. Specifically, the company said the move to 80nm circuitry was sped up by the use of a recess channel array transistor (RCAT). This three-dimensional transistor layout greatly enhances the refresh rate, which is a critical element in data storage, Samsung explained, noting its RCAT also reduces cell area coverage, which allows for increased process scaling by freeing up space for chip-per-wafer growth.

"With demand for DDR2 at its highest level since it was made its market debut in 2004, our 80nm technology provides us with the ability to more efficiently support the sustained demand growth that is expected in the DDR2 marketplace this year," said Tom Trill, director of DRAM marketing for Samsung Semiconductor, in a statement.

According to Gartner Dataquest, DDR2 memory will comprise over 50 percent of the entire DRAM market in 2006.

By: DocMemory
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