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Xilink sampels 65nm Virtex-5 FPGA


Monday, May 15, 2006

Xilinx has started general sampling of its 65nm FPGA family Virtex-5 and expects to be in volume production of the first version of Virtex-5 at the beginning of next year.

Asked how much of a lead that gave Xilinx over its chief rival Altera, Per Holmberg, director of programmable digital systems marketing at Xilinx replied: ¡§Six, maybe nine months.¡¨ Xilinx' CEO, Wim Roelandts pointed out: ¡§TSMC [Altera¡¦s foundry] is focusing on low power. UMC [Xilinx¡¦s foundry] is focused on high performance.¡¨ It is the high-end parts which usually move first to a new generation of process technology.

Compared to the 90nm Virtex-4, the performance of the 65nm Virtex-5 is 30 percent higher. The dynamic power of Virtex-5 is 35 percent lower than Virtex-4, which is achieved by a combination of using hard IPs, and by moving from 1.2V to 1V. The static power of Virtex-5 is about the same as Virtex-4, thanks to Xilinx¡¦s triple oxide approach and moves to strained silicon for the wafers and to nickel silicide for the dielectric material.

Roelandts said that the double foundry strategy of Xilinx was working well. ¡§The technology development risks are enormous,¡¨ said Roelandts, noting that having two foundries gives you some level of redundancy in case one foundry loses the recipe. "We taped out at UMC and Toshiba at the same time, and they delivered working silicon within one week of each other.¡¨

By: DocMemory
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