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NEC Electronics have announced what is claimed to be the industry's first 55nm CMOS-compatible embedded DRAM (eDRAM) technology.

An enhancement to NEC Electronics' patented metal-insulator-metal (MIM2) technology, the new eDRAM process is said to be the industry's first combination of hafnium silicate film and nickel silicide, which has resulted in reduced leakage current at this advanced node. Optimized for high-speed operation, the new process can be applied to system-on-chip (SoC) devices designed for a broad range of products -- from mobile equipment such as cell phones and mobile handheld devices to digital consumer devices such as gaming consoles.

NEC Electronics' eDRAM uniquely combines DRAM density with SRAM-like performance and low latency. With a lower soft error rate than embedded SRAM, NEC Electronics' eDRAM has blocks that can be rotated in any orientation on a chip to simplify integration with other on-chip components. The upper metal layers of an ASIC also can be routed over the top of eDRAM blocks to simplify chip design, improve timing and conserve silicon.

NEC Electronics' 55nm 8Mb and larger embedded DRAM macros are expected to be available for volume production in the second half of 2007.