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| Trump team wants Taiwan to train US chip plant workers |
11/27/2025 |
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Under the arrangement, Taiwanese companies including TSMC (2330.TW), opens new tab, the world's largest contract chipmaker, would send new capital and workers to expand their U.S. operations and train U.S. workers.
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| AI data centers shift to LPDDR to cut energy use |
11/27/2025 |
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Data centers supporting AI services are turning to low-power double data rate memory to reduce energy consumption, with Nvidia, Intel and other tech firms integrating LPDDR into server memory modules. This shift is prompting industry leaders Samsung Electronics and SK Hynix to accelerate development to maintain a technological edge as Chinese competitors advance their own LPDDR products.
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| Rapidus to start construction on 1.4nm fab in 2027 |
11/26/2025 |
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According to Nikkei Asia, this move is expected to help the Japanese chipmaker close the gap with the Taiwanese chip-making giant, which has already revealed its 1.4-nm technology earlier this year. The company also said that it will begin full-scale research and development on the node starting next year.
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| Huawei open-sources AI chip software to boost performance |
11/24/2025 |
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Huawei Technologies has introduced Flex:ai, an open-source software tool designed to optimize the performance of AI chips by pooling and orchestrating processors from various manufacturers. Built on Kubernetes, Flex:ai can enhance processor utilization by 30% by allowing multiple AI workloads to run simultaneously, according to Huawei.
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| Global semiconductor market to grow 22% |
11/24/2025 |
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The global semiconductor market reached $208 billion in the third quarter, driven by demand for AI and memory, according to World Semiconductor Trade Statistics data. Leading the market were Nvidia, Samsung Electronics and SK Hynix. Semiconductor Intelligence projects 22% growth for the year.
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| NanoIC releases process design kit with SRAM macros |
11/21/2025 |
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NanoIC has released its N2 Pathfinding process design kit, coordinated with Imec and featuring a library of 29 static RAM macros and support for backside and frontside power routing. The update targets early-stage system-on-chip design exploration beyond the 2-nanometer node.
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